Dr. Xiaoyang Lu
Dr. Xiaoyang Lu is a Assistant Research Professor in the Department of Computer Science at the Illinois Institute of Technology and a member of the Gnosis Research Center. Dr. Xiaoyang Lu works under the guidance of Dr. Xian-He Sun.
Publications
Authors | Title | Venue | Type | Date | Links |
|---|---|---|---|---|---|
| , , , , | Concurrency-Aware Cache Miss Cost Prediction with Perceptron Learning | The 35th ACM Great Lakes Symposium on VLSI (GLSVLSI 2025), New Orleans, LA, USA, June 30 - July 2, 2025 | Conference | June, 2025 | TBA |
| , , , , , , | ProMiner: Enhancing Locality, Parallelism, and Offloading for Graph Mining on Processing-in-Memory Systems | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025 | Journal | May, 2025 | TBA |
| , , , , | Pyramid: Accelerating LLM Inference with Cross-Level Processing-in-Memory | IEEE Computer Architecture Letters (CAL), April 2025 | Journal | April, 2025 | TBA |
| , , , , , , | AceMiner: Accelerating Graph Pattern Matching using PIM with Optimized Cache System | The 2024 IEEE 42nd International Conference on Computer Design (ICCD'24) | Conference | November, 2024 | |
| , , , , | ACES: Accelerating Sparse Matrix Multiplication with Adaptive Execution Flow and Concurrency-Aware Cache Optimizations | The 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-29) | Conference | April, 2024 | |
| , , , | CHROME: Concurrency-Aware Holistic Cache Management Framework with Online Reinforcement Learning | The 30th IEEE International Symposium on High-Performance Computer Architecture (HPCA 2024), Edinburgh, Scotland | Conference | March, 2024 | |
| , | The Memory-Bounded Speedup Model and Its Impacts in Computing | Journal of Computer Science and Technology (JCST'23), vol. 38, no. 1, February 2023 | Journal | February, 2023 | |
| , , | CARE: A Concurrency-Aware Enhanced Lightweight Cache Management Framework | The 29th IEEE International Symposium on High-Performance Computer Architecture (HPCA-29), Montreal, QC, Canada, February 25 - March 01, 2023 | Conference | February, 2023 | |
| , , , | A Generalized Model For Modern Hierarchical Memory System | The 2022 Winter Simulation Conference (WSC), Singapore, December 11-14, 2022 | Conference | December, 2022 | |
| , , | Premier: A Concurrency-Aware Pseudo-Partitioning Framework for Shared Last-Level Cache | The 2021 IEEE 39th International Conference on Computer Design (ICCD'21), October 24 - 27, 2021 | Conference | October, 2021 | |
| , , , , , , , | CoPIM: A Concurrency-aware PIM Workload Offloading Architecture for Graph Applications | The 2021 ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED'21), July 26, 2021 | Conference | July, 2021 | |
| , , | APAC: An Accurate and Adaptive Prefetch Framework with Concurrent Memory Access Analysis | The 38th IEEE International Conference on Computer Design (ICCD'20), October 18 - 21, 2020 | Conference | October, 2020 |